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  ? semiconductor components industries, llc, 2001 june, 2001 rev. 5 1 publication order number: mc14069ub/d mc14069ub hex inverter the mc14069ub hex inverter is constructed with mos pchannel and nchannel enhancement mode devices in a single monolithic structure. these inverters find primary use where low power dissipation and/or high noise immunity is desired. each of the six inverters is a single stage to minimize propagation delays. ? supply voltage range = 3.0 vdc to 18 vdc ? capable of driving two lowpower ttl loads or one lowpower schottky ttl load over the rated temperature range ? triple diode protection on all inputs ? pinforpin replacement for cd4069ub ? meets jedec ub specifications maximum ratings (voltages referenced to v ss ) (note 2.) symbol parameter value unit v dd dc supply voltage range 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) 0.5 to v dd + 0.5 v i in , i out input or output current (dc or transient) per pin 10 ma p d power dissipation, per package (note 3.) 500 mw t a ambient temperature range 55 to +125 c t stg storage temperature range 65 to +150 c t l lead temperature (8second soldering) 260 c 2. maximum ratings are those values beyond which damage to the device may occur. 3. temperature derating: plastic ap and d/dwo packages: 7.0 mw/  c from 65  c to 125  c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation, v in and v out should be constrained to the range v ss  (v in or v out )  v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com a = assembly location wl, l = wafer lot yy, y = year ww, w = work week device package shipping ordering information mc14069ubcp pdip14 2000/box mc14069ubd soic14 2750/box mc14069ubdr2 soic14 2500/tape & reel mc14069ubdt tssop14 mc14069ubf eiaj so14 96/rail see note 1. marking diagrams 1 14 pdip14 p suffix case 646 mc14069ubcp awlyyww soic14 d suffix case 751a tssop14 dt suffix case 948g 1 14 14069u awlyww 14 069u alyw 1 14 eiaj so14 f suffix case 965 1 14 mc14069ub alyw mc14069ubfel eiaj so14 see note 1. 1. for ordering information on the eiaj version of the soic packages, please contact your local on semiconductor representative. mc14069ubdtr2 tssop14 2500/tape & reel mc14069ubdtel tssop14 2000/tape & reel
mc14069ub http://onsemi.com 2 figure 1. pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 out 5 in 5 out 6 in 6 v dd out 4 in 4 out 2 in 2 out 1 in 1 v ss out 3 in 3 figure 2. circuit schematic figure 3. logic diagram 13 11 9 5 3 1 12 10 8 6 4 2 v dd = pin 14 v ss = pin 7 v dd v ss output input* *double diode protection on all inputs not shown figure 4. switching time test circuit and waveforms pulse generator v dd v ss 7 input output c l 14 20 ns 20 ns v dd v ss v oh v ol t thl t tlh output input t phl t plh 90% 50% 10% 90% 50% 10% (1/6 of circuit shown)
mc14069ub http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? electrical characteristics (voltages referenced to v ss ) ??????????? ??????????? ??? ??? symbo ??? ??? v dd ????? ????? 55  c ????????? ????????? 25  c ????? ????? 125  c ??? ??? ??????????? ??????????? characteristic ??? ??? symbo l ??? ??? v dd vdc ??? ??? min ??? ??? max ???? ???? min ??? ??? typ (4.) ???? ???? max ??? ??? min ??? ??? max ??? ??? unit ??????????? ? ????????? ? ??????????? output voltage a0o level v in = v dd ??? ? ? ? ??? v ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? e e e ??? ? ? ? ??? 0.05 0.05 0.05 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0 0 0 ???? ? ?? ? ???? 0.05 0.05 0.05 ??? ? ? ? ??? e e e ??? ? ? ? ??? 0.05 0.05 0.05 ??? ? ? ? ??? vdc ??????????? ? ????????? ? ??????????? v in = 0 a1o level ??? ? ? ? ??? v oh ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? e e e ???? ? ?? ? ???? 4.95 9.95 14.95 ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? e e e ??? ? ? ? ??? vdc ??????????? ? ????????? ? ? ????????? ? ??????????? input voltage a0o level (v o = 4.5 vdc) (v o = 9.0 vdc) (v o = 13.5 vdc) ??? ? ? ? ? ? ? ??? v il ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1.0 2.0 2.5 ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 2.25 4.50 6.75 ???? ? ?? ? ? ?? ? ???? 1.0 2.0 2.5 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1.0 2.0 2.5 ??? ? ? ? ? ? ? ??? vdc ??????????? ? ????????? ? ? ????????? ? ??????????? a1o level (v o = 0.5 vdc) (v o = 1.0 vdc) (v o = 1.5 vdc) ??? ? ? ? ? ? ? ??? v ih ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? 4.0 8.0 12.5 ??? ? ? ? ? ? ? ??? e e e ???? ? ?? ? ? ?? ? ???? 4.0 8.0 12.5 ??? ? ? ? ? ? ? ??? 2.75 5.50 8.25 ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 4.0 8.0 12.5 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? vdc ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? output drive current (v oh = 2.5 vdc) source (v oh = 4.6 vdc) (v oh = 9.5 vdc) (v oh = 13.5 vdc) ??? ? ? ? ? ? ? ? ? ? ??? i oh ??? ? ? ? ? ? ? ? ? ? ??? 5.0 5.0 10 15 ??? ? ? ? ? ? ? ? ? ? ??? 3.0 0.64 1.6 4.2 ??? ? ? ? ? ? ? ? ? ? ??? e e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 2.4 0.51 1.3 3.4 ??? ? ? ? ? ? ? ? ? ? ??? 4.2 0.88 2.25 8.8 ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e e ??? ? ? ? ? ? ? ? ? ? ??? 1.7 0.36 0.9 2.4 ??? ? ? ? ? ? ? ? ? ? ??? e e e e ??? ? ? ? ? ? ? ? ? ? ??? madc ??????????? ? ????????? ? ??????????? (v ol = 0.4 vdc) sink (v ol = 0.5 vdc) (v ol = 1.5 vdc) ??? ? ? ? ??? i ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 0.64 1.6 4.2 ??? ? ? ? ??? e e e ???? ? ?? ? ???? 0.51 1.3 3.4 ??? ? ? ? ??? 0.88 2.25 8.8 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0.36 0.9 2.4 ??? ? ? ? ??? e e e ??? ? ? ? ??? madc ??????????? ??????????? input current ??? ??? i in ??? ??? 15 ??? ??? e ??? ??? 0.1 ???? ???? e ??? ??? 0.00001 ???? ???? 0.1 ??? ??? e ??? ??? 1.0 ??? ??? m adc ??????????? ? ????????? ? ??????????? input capacitance (v in = 0) ??? ? ? ? ??? c in ??? ? ? ? ??? e ??? ? ? ? ??? e ??? ? ? ? ??? e ???? ? ?? ? ???? e ??? ? ? ? ??? 5.0 ???? ? ?? ? ???? 7.5 ??? ? ? ? ??? e ??? ? ? ? ??? e ??? ? ? ? ??? pf ??????????? ? ????????? ? ??????????? quiescent current (per package) ??? ? ? ? ??? i dd ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? e e e ??? ? ? ? ??? 0.25 0.5 1.0 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0.0005 0.0010 0.0015 ???? ? ?? ? ???? 0.25 0.5 1.0 ??? ? ? ? ??? e e e ??? ? ? ? ??? 7.5 15 30 ??? ? ? ? ??? m adc ??????????? ? ????????? ? ? ????????? ? ??????????? total supply current (5.) (6.) (dynamic plus quiescent, per gate) (c l = 50 pf) ??? ? ? ? ? ? ? ??? i t ??? ? ? ? ? ? ? ??? 5.0 10 15 ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? i t = (0.3 m a/khz) f + i dd /6 i t = (0.6 m a/khz) f + i dd /6 i t = (0.9 m a/khz) f + i dd /6 ??? ? ? ? ? ? ? ??? m adc ??????????? ? ????????? ? ? ????????? ? ??????????? output rise and fall times (5.) (c l = 50 pf) t tlh , t thl = (1.35 ns/pf) c l + 33 ns t tlh , t thl = (0.60 ns/pf) c l + 20 ns t tlh , t thl = (0.40 ns/pf) c l + 20 ns ??? ? ? ? ? ? ? ??? t tlh , t thl ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? e e e ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 100 50 40 ???? ? ?? ? ? ?? ? ???? 200 100 80 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? ns ??????????? ? ????????? ? ? ????????? ? ? ????????? ? ??????????? propagation delay times (5.) (c l = 50 pf) t plh , t phl = (0.90 ns/pf) c l + 20 ns t plh , t phl = (0.36 ns/pf) c l + 22 ns t plh , t phl = (0.26 ns/pf) c l + 17 ns ??? ? ? ? ? ? ? ? ? ? ??? t plh , t phl ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ? ? ? ??? 65 40 30 ???? ? ?? ? ? ?? ? ? ?? ? ???? 125 75 55 ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? ns 4. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance. 5. the formulas given are for the typical characteristics only at 25  c. 6. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l 50) vfk where: i t is in m a (per package), c l in pf, v = (v dd v ss ) in volts, f in khz is input frequency, and k = 0.002.
mc14069ub http://onsemi.com 4 package dimensions pdip14 p suffix case 64606 issue m 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m --- 10 --- 10 n 0.015 0.039 0.38 1.01  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n t 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc14069ub http://onsemi.com 5 package dimensions so14 d suffix case 751a03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m  dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 
mc14069ub http://onsemi.com 6 package dimensions tssop14 dt suffix case 948g01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-.  s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ??? ??? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n
mc14069ub http://onsemi.com 7 package dimensions so14 f suffix case 96501 issue o h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z
mc14069ub http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc14069ub/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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